Path: utzoo!attcan!uunet!fernwood!decwrl!elroy.jpl.nasa.gov!usc!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!emory!mephisto!bloom-beacon!eru!luth!sunic!mcsun!ukc!mucs!r4!mshute From: mshute@r4.uucp (Malcolm Shute) Newsgroups: comp.arch Subject: Re: 64-bit addresses Message-ID: <986@m1.cs.man.ac.uk> Date: 21 Feb 90 12:22:22 GMT References: <9708@spool.cs.wisc.edu> <20270@cfctech.cfc.com> <36080@mips.mips.COM> <168@csinc.UUCP> Sender: news@cs.man.ac.uk Reply-To: mshute@r4.UUCP (Malcolm Shute) Organization: University of Manchester, UK Lines: 34 >In article <36080@mips.mips.COM>, mash@mips.COM (John Mashey) writes: >> Barry has a good analysis, but I'd observe a few other things: and proceeds to observe that most people who think they want 64bit addressing haven't thought through their reasoning, and realised that they *could* live without it if they redesigned their proposed solution properly. But isn't this the point in current computer usage: hardware is cheap, salaries are expensive. If there is a 'natural' sledgehammer approach which will ensure that the job is finished quickly, and correctly (this follows from it being a 'natural' approach wrt to the human minds that designed it) then it beats the more thought-intensive solutions. However, to change sides now, and argue the other way, In article <168@csinc.UUCP> rpeglar@csinc.UUCP (Rob Peglar) writes: >Today, I'm sure codes could use two-digit GB D-spaces (10-99 GB per >file) if they had it. [...] I agree with this completely, as suggested by my paragraph above, but this is just the first hurdle. Assuming that it is accepted now that applications *do* exist which *can* use such amounts of address space; we now have the problem of establishing that the laws of physics will *allow* them to use it. "Barry's Good Analysis", alluded to above, is a convincing one: how can we expect to see machines with 64bit adrspc until we have machines that can do useful things with it in small finite time? The answer to the original poster's original question must surely still be: "Not until instruction speeds are of the order of 4.0e9 times faster than they are at present (i.e. to cover 2^64 locations in about the time that current processors take to cover 2^32 locations)", or "Not until we can get 4.0e9 times as many processors sharing the job of massaging all of those locations". Malcolm Shute. (The AM Mollusc: v_@_ ) Disclaimer: all