Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!uwm.edu!lll-winken!ames!uhccux!munnari.oz.au!mullian!raob From: raob@mullian.ee.mu.oz.au (Richard Oxbrow) Newsgroups: comp.arch Subject: Re: bus on new IBMs Message-ID: <3236@munnari.oz.au> Date: 24 Feb 90 03:58:09 GMT References: Sender: news@cs.mu.oz.au Reply-To: raob@mullian.ee.mu.OZ.AU (Richard Oxbrow) Organization: Dept. of Electrical Engineering, University of Melbourne Lines: 36 In article wsd@cs.brown.edu (Wm. Scott `Spot' Draves) writes: > >I read in Unix Today! that the new IBM RISCs used an improved MCA bus >that doubled its performance from 20Mb/s to 40Mb/s. There is a >separate, higher performance, bus for memory. > >Isn't this quite underpowered relative to the CPU? What sort of >swapping performance can I expect? > >For comparison, the SS1's S-bus is 100Mb/s, I think. > You really need to have a look at the specifications of both buses. In the case of the S-Bus you should read the specs. 100 Mb/s @25Mhz "burst" thru' put for the S-Bus For the case of the S-Bus on a 16 2/3 Mhz bus, a'la SS1 29 Mb/s @16 2/3Mhz "burst" thru' put (DMA) 25 Mb/s @16 2/3Mhz "burst" thru' put (DVMA) I would emphasis the the word "burst", you really need to have a close look at the S-Bus specs in relation to the architecture of the machine with the S-Bus. The S-bus however is a nice and simple bus with a reasonabley high thru' put. richard .. #ps. any hints on the next line of Suns ? Richard Oxbrow |ACSnet raob@mullian.oz dept. of ee eng ,uni of melbourne |Internet raob@mullian.ee.mu.OZ.AU parkville 3052 australia |Arpa-relay raob%mullian.oz@uunet.uu.net fax +[061][03]344 6678 |Uunet uunet!munnari!mullian!raob