Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!hellgate.utah.edu!helios.ee.lbl.gov!ucsd!ucsdhub!celit!ps
From: ps@fps.com (Patricia Shanahan)
Newsgroups: comp.arch
Subject: Re: 64-bit addresses
Message-ID: <7015@celit.fps.com>
Date: 26 Feb 90 17:39:14 GMT
References: <1662@aber-cs.UUCP>
Sender: daemon@fps.com
Reply-To: ps@fps.com (Patricia Shanahan)
Organization: FPS Computing Inc., San Diego CA
Lines: 34

In article <1662@aber-cs.UUCP> pcg@cs.aber.ac.uk (Piercarlo Grandi) writes:
...
>Page size ought to be *only* determined by what makes the working set
>smallest, and this points to very small page sizes, indeed it points to
>object memory, like the Burroughs. In practice you also have that fine
>granularity is swamped by high overheads, mainly the IO ones, so you have to
>make do with coarser granularity than you'd like.
>
...
>-- 
>Piercarlo "Peter" Grandi           | ARPA: pcg%cs.aber.ac.uk@nsfnet-relay.ac.uk
>Dept of CS, UCW Aberystwyth        | UUCP: ...!mcvax!ukc!aber-cs!pcg
>Penglais, Aberystwyth SY23 3BZ, UK | INET: pcg@cs.aber.ac.uk


I disagree. Page size, as part of the overall memory design, should be
determined  mainly by what gives the lowest average memory access time 
for target workloads, for a given cost. Consideration should also be given
to minimizing the probability of any given workload having a very long
average memory access time.

Average memory access time includes the time to do a successful virtual to
real translation for anything that is not in a virtual-addressed cache. The
more complicated and finer granularity the virtual to real mapping, the harder
it is to make it really fast.

For some workloads, minimizing the working set may be the way to optimize
the memory access time. It does not seem a good sole objective for something
as important to memory hierarchy design as the page size.
--
	Patricia Shanahan
	ps@fps.com
        uucp : {decvax!ucbvax || ihnp4 || philabs}!ucsd!celerity!ps
	phone: (619) 271-9940