Path: utzoo!attcan!uunet!cs.utexas.edu!usc!elroy.jpl.nasa.gov!ames!ames.arc.nasa.gov!lamaster
From: lamaster@ames.arc.nasa.gov (Hugh LaMaster)
Newsgroups: comp.arch
Subject: Re: Cache Size
Keywords: garbage collection, locality of reference, cache size
Message-ID: <43836@ames.arc.nasa.gov>
Date: 27 Feb 90 21:45:37 GMT
References: <7393@pdn.paradyne.com> <76700146@p.cs.uiuc.edu> <1990Feb26.022057.28461@Neon.Stanford.EDU> <8189@pt.cs.cmu.edu>
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In article <8189@pt.cs.cmu.edu> koopman@a.gp.cs.cmu.edu (Philip Koopman) writes:
>In article <1990Feb26.022057.28461@Neon.Stanford.EDU>, wilson@carcoar.Stanford.EDU (Paul Wilson) writes:
>So, that's why most supercomputers seem to use vector register
>files instead of caches for their vector units.

Or, at least semi-bypass the scalar data cache for vector reads and writes 
(coherency can become a performance issue, though, if you have a real cache).

On the Cray machines, scalar data "caches" have always been explicitly 
programmed as "registers" anyway, so the bypassing is easy.

  Hugh LaMaster, m/s 233-9,  UUCP ames!lamaster
  NASA Ames Research Center  ARPA lamaster@ames.arc.nasa.gov
  Moffett Field, CA 94035     
  Phone:  (415)604-6117