Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!usc!snorkelwacker!spdcc!mirror!ima!esegue!compilers-sender From: wendyt@cs.washington.edu (Wendy Thrash) Newsgroups: comp.compilers Subject: Re: Register Allocation Keywords: Pointers Message-ID: <1990Feb26.214703.10586@esegue.segue.boston.ma.us> Date: 26 Feb 90 21:47:03 GMT References: <1990Feb20.155619.3121@esegue.segue.boston.ma.us> <1990Feb24.210757.4202@esegue.segue.boston.ma.us> Sender: compilers-sender@esegue.segue.boston.ma.us Reply-To: wendyt@cs.washington.edu (Wendy Thrash) Organization: University of Washington, Computer Science, Seattle Lines: 24 Approved: compilers@esegue.segue.boston.ma.us >[The PDP-10/DEC-20 has addressable registers as well, but as pointed out >elsewhere that's only a small part of the problem. As soon as you call >another routine, it's liable to save the register and put something else >there, and you lose. -John] The Pyramid architecture (Pyramid Technology) combines addressable registers (which take a bit of work to address, but not _too_ much) with register windows. As long as variables that have had their addresses taken are assigned to parameter registers or local registers, but not temporary registers, their registers are not accessible to called routines. (More precisely, they cannot be accessed in any quasi-legitimate way by a subroutine, and certainly will not be accessed by the compilers.) I believe their architecture solves the problems discussed here, but I've been told that the hardware cost to make this register addressing work is significant. (or perhaps it was "enormous") Disclaimer: Perhaps I should say "our" architecture, since I may technically still be an employee of Pyramid Technology, on leave. Maybe my old boss will see this and let me know whether I still "work" there. :-) -- Send compilers articles to compilers@esegue.segue.boston.ma.us {spdcc | ima | lotus}!esegue. Meta-mail to compilers-request@esegue. Please send responses to the author of the message, not the poster.