Path: utzoo!censor!geac!maccs!cs4g6ag From: cs4g6ag@maccs.dcss.mcmaster.ca (Stephen M. Dunn) Newsgroups: comp.sys.ibm.pc Subject: Re: Memory cache *and* zero wait state? Message-ID: <25E95495.435@maccs.dcss.mcmaster.ca> Date: 26 Feb 90 16:08:53 GMT References: <25dc04c8@ralf> <1860@clyde.concordia.ca> <9275@portia.Stanford.EDU> Reply-To: cs4g6ag@maccs.dcss.mcmaster.ca (Stephen M. Dunn) Organization: McMaster University, Hamilton, Ontario Lines: 42 In article <9275@portia.Stanford.EDU> dhinds@portia.Stanford.EDU (David Hinds) writes: $ SRAM will never replace DRAM for normal bulk main memory. SRAM requires $either twice or four times as many transistors as the same amount of DRAM - $I don't quite remember which. The extra circuit complexity is also a problem, $I think. In any case, in terms of how difficult a chip is to make (= price, $sort of), an SRAM of a given size will equal about 2 to 4 DRAMs of the same $size. This seems to be confirmed by the progress and prices of SRAM chips $vs. DRAMs recently. The speed improvements of DRAM's haven't fallen that far $behind increases in CPU demands on memory. They are starting to now - which $is why an increasingly large fraction of PC's will have static RAM caches. DRAM requires one transistor per bit; I'm not sure how many SRAM requires, although I do recall that in at least some SRAMs of the early 80s they used six transistors per bit. This alone means that DRAMs will always, given the same technology, have much higher densities than SRAMs. And don't be fooled too much by the price argument ... sure, the more complex the chip, the lower the yield on a wafer is, and so the higher the price must be, but supply and demand also plays a very important role. Look at the prices for, say, a 25 MHz 80387 and tell me how much of that is really manufacturing cost. There was a PC back about a year or two after the AT was introduced that had a 1M SRAM memory for no-wait-state performance, but I don't think anyone is doing that any longer (especially since ATs no longer need SRAM for 0-WS). $ The speed of a chip is due to a combination of switching times and signal $propagation delays. So, if you just make a chip smaller, it should get faster. $I'm not sure what the physical limit is for silicon-based IC's, but it must be $within an order of magnitude of present speeds (which means we are close, $judging from the rate of improvement of technology). Yes, the limit for silicon is about 0.1 micron ... currently, most chips are fabbed (as far as I know ... which isn't that far) at between 0.5 and 2 microns. GaAs can go quite a bit smaller than that, but of course they won't be reaching the limits of GaAs for a long, long time since they're still struggling with getting good yields out of it for not-too-complex chips. -- Stephen M. Dunn cs4g6ag@maccs.dcss.mcmaster.ca = "\nI'm only an undergraduate!!!\n"; **************************************************************************** I Think I'm Going Bald - Caress of Steel, Rush