Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!rice!uw-beaver!uw-june!kolding
From: kolding@cs.washington.edu (Eric Koldinger)
Newsgroups: comp.arch
Subject: Re: IBM RISC System/6000  AS/400 (actually a diversion on the topic)
Message-ID: <10901@june.cs.washington.edu>
Date: 1 Mar 90 04:15:16 GMT
References: <20714@cfctech.cfc.com> <1990Feb28.042949.21952@edm.uucp> <1990Feb28.174838.7725@esegue.segue.boston.ma.us>
Reply-To: kolding@june.cs.washington.edu (Eric Koldinger)
Organization: University of Washington, Computer Science, Seattle
Lines: 40

In article <1990Feb28.174838.7725@esegue.segue.boston.ma.us> johnl@esegue.segue.boston.ma.us (John R. Levine) writes:
>In article <1990Feb28.042949.21952@edm.uucp> geoff@edm.uucp (Geoff Coleman) writes:
>>	Actually this is about the first posting I've seen which
>>mentions both the AS/400 and the 6000. ...
>>It would seem to me that IBM just may have introduced an AS/400 killer.
>
>From my understanding of the AS/400, based on some frustratingly vague
>articles in the IBM Systems Journal last year, the AS/400 has a multi-level
>virtual architecture.  In particular AS/400 "executable" files are in fact
>in a virtual microcode that is compiled to the native microcode at the time
>the program is loaded.

   Yes, somewhat.  Some programs are translated to IMPI, the internal machine
   language, which is interpreted by HMC, or what most people would call
   microcode.  Others are left at the MI, or machine interface, which is the
   same as the S/38 MI (and assembly language), I believe.

>Different models of the AS/400 can and do have
>different native microcodes.
    
    I think they all run the same micro-code.  At least they all run the same
    VMC (vertical microcode).

>I see no reason why they couldn't use the 6000's
>processor as such an engine, though to implement the AS/400's enormous
>single level address space you'd probably want a different memory mapper
>than the 801-like one that they use now.

The AS/400 uses 48-bit addresses, so you'd have to add 48-bit addressing
registers to the architecture (or convert the register file to 48 bits).  Also,
the AS/400 uses a tagged memory system to support it's capability's, and does a
lot of the capability checking in hardware, not software.  You'd need to add
support for this also, or lose performance.  I highly doubt that they'll use
the America chip the AS/400.

-- 
        _   /|                          Eric Koldinger
        \`o_O'                          University of Washington
          ( )     "Gag Ack Barf"        Department of Computer Science
           U                            kolding@cs.washington.edu