Path: utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!tut.cis.ohio-state.edu!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!emory!cambridge.apple.com!bloom-beacon!snorkelwacker!spdcc!esegue!compilers-sender From: dds@cc.ic.ac.uk (Diomidis Spinellis) Newsgroups: comp.compilers Subject: Re: Register Allocation Keywords: Pointers Message-ID: <1990Feb28.051730.5340@esegue.segue.boston.ma.us> Date: 28 Feb 90 05:17:30 GMT References: <1990Feb20.155619.3121@esegue.segue.boston.ma.us> <1990Feb24.210757.4202@esegue.segue.boston.ma.us> Sender: compilers-sender@esegue.segue.boston.ma.us Reply-To: dds@cc.ic.ac.uk (Diomidis Spinellis) Organization: Imperial College Department of Computing Lines: 34 Approved: compilers@esegue.segue.boston.ma.us In article <1990Feb24.210757.4202@esegue.segue.boston.ma.us> cik@l.cc.purdue.edu (Herman Rubin) writes: >In article <1990Feb20.155619.3121@esegue.segue.boston.ma.us>, napi@rangkom.MY (Mohd Hanafiah b. Abdullah) writes: >> How does one perform register allocation on scalar variables that may >> be pointed to by others? [...] >and I have no difficulty using machine language. The only mainframes whose >instruction set I have known which are appropriately set up in hardware for >this are the long obsolete UNIVAC 1108 and 1110. [...] >[The PDP-10/DEC-20 has addressable registers as well, but as pointed out >elsewhere that's only a small part of the problem. As soon as you call >another routine, it's liable to save the register and put something else >there, and you lose. -John] Addressing registers is possible in the Texas Instruments TM 990 series of minis and TMS-9900, TMS-9950 microprocessors. All 16 general purpose registers are in a memory block pointed by a single processor register the workspace pointer. With some care one can implement register windowing. Saving the registers is then just a change of the workspace pointer; pointers that point to registers in previous stack frames still point to the correct object. On the 9995 the registers can be located on on-chip RAM, so the performance is not affected by the cost of external memory accesses. -- Diomidis Spinellis Internet: dds@cc.ic.ac.uk Department of Computing UUCP: ...!ukc!iccc!dds Imperial College JANET: dds@uk.ac.ic.cc London SW7 2BZ -- Send compilers articles to compilers@esegue.segue.boston.ma.us {spdcc | ima | lotus}!esegue. Meta-mail to compilers-request@esegue. Please send responses to the author of the message, not the poster.