Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!uunet!convex!swarren
From: swarren@convex.com (Steve Warren)
Newsgroups: comp.sys.amiga.hardware
Subject: Re: One more Amiga RAM question. ;*)
Message-ID: <100326@convex.convex.com>
Date: 28 Feb 90 19:09:46 GMT
References: <928@orange9.qtp.ufl.edu>
Sender: news@convex.com
Distribution: na
Organization: Convex Computer Corporation; Richardson, TX
Lines: 93

In article <928@orange9.qtp.ufl.edu> sutherla@qtp.ufl.edu (scott sutherland) writes:
                            [...]
>	How can the A2091, which uses 16-bit RAM, and the A2630, which
>uses 32-bit RAM, use the same type of chips, with the only difference
>being the SPEED??????????  If this is true, do I use the same number
>of the faster chips for 2 Megs on the A2630?? 

The memory chips are 4 bits wide.  When a single location on one chip
is addressed, 4 bits of data are output.  Four of these chips used in
parallel will provide a 16-bit data bus in the case of the 2091.  The
2091 cannot be expanded 4 chips at a time, but if the control circuits
(and the autoconfig standard) supported it, your four chips would
provide 256K X 4 bits X 4 chips = 4 Mbits/(8 bits/byte) = 1/2 Mbyte.
So using 16 chips in four blocks of 512 K would give you 2 Mbytes.

On the 2630 you need 8 chips in parallel to get the 32 bit data bus.
This gives a 1 Mbyte block of 32-bit ram.  16 chips will provide
2 Mbytes.

>	The specs on the A2630 state that it comes with 2 Megs of 
>100 ns RAM.  According to the Amiga World review (March 1990), they
>should have used 80 ns or 70 ns RAM, like the Hurricane and other
>'030 boards...

The timing of the memory system is not determined by the access times
of the memory chips.  The timing is determined by the *controller*
circuitry which drives the drams.  However, if the controller requests
data from a chip and the chip does not provide the data in time then
the board will essentially output garbage instead of data.  In other
words, if the chips are too slow, everyone will know it in no
uncertain terms.  Also, watch out for Amiga World.  They are not an
authority on everything they talk about (OK, sometimes they are right;
I prefer to remember all the times they didn't know what they were
talking about ;^).

>            ...AW also says that the 2 Megs on the A2630 are soldered
>in and would be difficult to remove.  My question is this.  If I leave
>the 2 Megs of 100 ns RAM in there and decide to add two more Megs of
>32-bit RAM, DO I HAVE TO USE 100 ns RAM, OR CAN I USE 70 OR 80 ns RAM
>TO IMPROVE PERFORMANCE????   What will be the effect, if any, (especially
>adverse effects) of having 2 different speeds of RAM on the board?  Would
>I be better off removing the original 2 Megs and using the same chips for
>all 4 Megs?

As I said, the timing of the system is determined by the controller.  Once
the controller timing is determined then the drams must be at least X nsec
access time drams, because the controller assumes, X nsec after the request
is made, that the data is available and is valid.  Since dram chips do
not come with any outputs that say "the data is now a valid output" the
controller simply waits X nsecs and sends whatever is on the output pins
of that chip out to the rest of the world.  If the data happens to be
garbage because the chip is too slow then the controller is perfectly
happy to send out garbage (assuming no parity, a safe assumption on the
Amiga).

What this means is that if the memory controller on the 2630 is designed
to expect data 100 ns after a request to the chip, then that is how long
it is going to wait.  If you replace 100 ns chips with 80 ns chips then
the data will be available 20 nsec before the controller needs it.  In
other words, you gain only increased margin, not performance.
                                [...]
>What in the world is a ZIP package???  Again, none of the advertisers in CS 
>mention anything about ZIP!!  They mentions SIMMS, but NO ZIPS.  Why do I need
>ZIP?  How do I determine if a chip advertised in CS is ZIP or not???

I don't know the package codes, but I imagine if you call them you might
find someone with zip packages.  From what I understand a zip package is
a zig-zag in-line package.  That is, the chip stands on its side with the
leads coming out of the side, but the leads are staggered in a zig-zag
pattern.  The advantage is that you achieve much of the space-saving
potential of a simm, without the added expense.  The only trouble is
that these packages are much harder to find than dip packages.

I don't know why the chips are soldered in, unless the extra capacitance
of a socket would be detrimental to the system.  Since zips have leads
they should be socketable.  Probably it was cheaper and presented less
quality concerns, since socketed parts have been known to "walk" their
way out.

>	AS YOU CAN SEE, I AM TOTALLY CONFUSED.  ANY HELP IN "STRAIGHTENING
>ME OUT" WOULD BE APPRECIATED.
>
>Thanks,
>
>Scott Sutherland
>sutherla@qtp.ufl.edu

Hope this helped.

--
--Steve
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