Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!swrinde!zaphod.mps.ohio-state.edu!brutus.cs.uiuc.edu!jarthur!polyslo!vlsi3b15!batman!nicholaA From: nicholaA@batman.moravian.EDU (Andy Nicholas) Newsgroups: comp.sys.apple Subject: Re: 20 Mhz 65816 Summary: No, it's NOT microcoded Message-ID: <1154@batman.moravian.EDU> Date: 1 Mar 90 23:17:15 GMT References: <10393.infoapple.net@pro-generic> <1990Feb28.232226.7137@spectre.ccsf.caltech.edu> Organization: Moravian College, Bethlehem, PA Lines: 55 In article <1990Feb28.232226.7137@spectre.ccsf.caltech.edu>, toddpw@tybalt.caltech.edu (Todd P. Whitesel) writes: > [ he's seen confirmed existence of the chip ] > > >THERE IS NOW *** NO EXCUSE *** FOR APPLE TO COMPLAIN THAT THEY CANNOT GET > >PARTS. Mensch's alleged 12 Mhz 65816's, shown at AppleFest, with which he > >used to burn Gassee, were and are in extremely short supply because he cannot > >get them working right. It is well known that Western Digital's 65816's have > >problems running all instructions at high speed. When asked about this, Tony > >assured me that his chips DO NOT share this anomaly. > > This is because Mensch's design is, to be honest, microcoded, and he's had > problems because you can't just shrink the circuit like he's trying to do > because of scaling problems that occur at about the 1 micron level (according > to people who know more than I do about this stuff, all I've done was a > photolithographed inverter). No, it's NOT microcoded. Inherently, that's one of Mensch's problems... everything on the 65816 is done at the gate level. He hard-wires EVERYTHING. This is one of the reasons that stuff from WDC takes SOOOOoooo long to get out. I wish there were some kind of 'super-auto-router CAD program' for Mensch to use. His wife or daughter did the layout for the 65816, which is one of the reasons that the chip has problems -- one of the engineers from AE once told me that Mensch had told him that the problem with certain instructions not working at high speeds was the physical distance that some of the signals had to travel inside the chip. Make of that what you will... The 68000 is microcoded. Later versions (680x0) have taken the most-used instructions and hard-coded them. I don't really know about the 68040, though, since Motorola used VHDL to build it. WDC did a production run at 1.5 micron and was hoping for mass quantities of 10 Mhz 65816's... this was in July. They found that the yield was abismal, so they're latest production run was at 1.0 micron. I never heard what the yield was like at 1.0... In posts on GEnie, someone from ASIC said that they thought that initial runs of their 65816 at 1.5 micron could run as slow (hah) as 13-15 Mhz. If that was the case, the foundry was going to do a production run at 1.0 micron to get the true 20 Mhz speed. How awful, "just" 13-15 Mhz. shucks. I was kind of hoping that ASIC would be intelligent enough in later chips to put an internal data and instruction cache right onto the chip so that their chip could run at a really high rate of speed, but the ram wouldn't have to be the 25-35ns speeds that will be required at 20 Mhz. This might be "iffy" because one of the guys in ASIC used to work for Rocket until they got sued by Zip Technologies... > Todd Whitesel andy -- Yeah!