Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!uwm.edu!ogicse!orstcs!guille.ECE.ORST.EDU!daver From: daver@guille.ECE.ORST.EDU (Dave Rabinowitz) Newsgroups: comp.sys.handhelds Subject: Re: HP28 Emulator (Was: Re: (none) --- HP-28S Exponentiation) Keywords: HP-28S ^ exponentiation power Message-ID: <16538@orstcs.CS.ORST.EDU> Date: 7 Mar 90 00:19:49 GMT References: <364@images1.Waterloo.NCR.COM> <1090@tuvie> <1143@tuvie> <52051@microsoft.UUCP> Sender: usenet@orstcs.CS.ORST.EDU Reply-To: daver@guille.ECE.ORST.EDU.ECE.ORST.EDU (Dave Rabinowitz) Organization: Oregon State University, E&CE, Corvallis Lines: 26 >> (I doubt that a CPU emulator would be as fast as the HP28 even on a >> fast AT)... > >You could build a Saturn emulator that would blow the socks off the >HP28. They call it a 1MHz machine, but that doesn't say much about >the instruction timing. Someone recently claimed that the 28 has a >one bit memory bus, which I am inclined to believe. At best, it has >a 4 bit memory bus and a 4 bit register bus. With a 16 bit 286 running >at 16 MHz, you would have 64 times the speed. That is easily enough >to emulate the Saturn at several times the speed of the 28. It might help to compare apples to apples. The "1MHz" number refers to bus operation speed, not system clock speed. If I remember correctly, the CPU clock on a "1MHz" Saturn processor runs at 8MHz (alternately, a 16MHz 286 machine typically gets 2 bus cycles/microsecond), so the raw clock speed differs by only about 2:1. The fastest Saturn instruction takes 2 bus cycles and the slowest takes fewer than 25 and manipulates a large number of bytes of data in its execution, so you're not likely to get much if any speed advantage emulating the processor on the fastest 286 system. When the CPU architecture was first defined a software emulator was written to allow programmers to play with the architecture, develop basic algorithms and come up with suggestions for change before the design was frozen in silicon. The emulator ran on an HP-1000 system, a 16-bit minicomputer with a 1.2usec instruction time, and was much slower than the first CPU chip, which had a 2usec bus cycle.