Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!tut.cis.ohio-state.edu!snorkelwacker!spdcc!esegue!johnl
From: johnl@esegue.segue.boston.ma.us (John R. Levine)
Newsgroups: comp.sys.ibm.pc
Subject: Re: Interrupt question
Message-ID: <1990Mar1.211608.16643@esegue.segue.boston.ma.us>
Date: 1 Mar 90 21:16:08 GMT
References: <140700021@cdp>
Reply-To: johnl@esegue.segue.boston.ma.us (John R. Levine)
Organization: Segue Software, Cambridge MA
Lines: 49

In article <140700021@cdp> jim@cdp.UUCP writes:
>Does anyone have any information on exactly (in excruciating detail)
>what happens after the CPU receives a hardware interrupt and before the time
>the interrupt handler is entered.

If it's an external interrupt, the device yanks its interrupt line which is
typically connected to an 8259A interrupt controller.  That controller in
turn signals the CPU via its INTR input.  If the CPU has interrupts
enabled, it then issues a special bus cycle to acknowledge the interrupt
and read an 8-bit interrupt type from the 8259A.  On a PC this number will
generally be between 10 and 17, corresponding to IRQ lines 0 to 7.  It then
multiplies the interrupt type by 4 to get the address from which it will
load the interrupt routine, e.g. IRQ 2 is interrupt 12 whose interrupt
routine address is at location 48.  A request on the NMI line is always
type 2 but is otherwise similar.

An internally generated interrupt gets its type number from the INT
instruction or, if it's a divide error, INTO, or other internal trap, a
fixed number depending on the type of the interrupt.

Then the processor pushes the flags register, the IP (instruction pointer),
and the CS (code segment) on the current stack.  It turns off the interrupt
flag.  It loads the IP and CS from the two words at the address computed
above.  The rest is up to you.

Your routine has to save any registers that it uses, probably switch to
another stack since you can't count on the existing stack having much room,
do whatever it does, restore the registers, and do an IRET.  If your
interrupt handler is written in C, you will need to set up the segment
registers to match what the C compiler expected.  Some compilers, notably
Turbo C have an "interrupt" keyword on a routine that tells it to save all
of the registers.  Unfortunately, since it doesn't switch stacks this is of
limited use and you usually still need some assembler glue.

If the interrupt was due to INTR, you need to execute an OUT instruction to
the 8259A to tell it to dismiss the interrupt just before the IRET.

When you tell DOS to install an interrupt routine, all it does is to stuff
the address of your interrupt routine into the hardware table of interrupt
addresses.  DOS 3.3 has some sort of stack switching code for its own use
but it's not clear if one can take advantage of it.

If you are in protected mode on a 286, 386, or 486, the response to an
interrupt is considerably more complicated, involving segment and task
switching.  For details on that, see Intel's programmer's reference manuals.
-- 
John R. Levine, Segue Software, POB 349, Cambridge MA 02238, +1 617 864 9650
johnl@esegue.segue.boston.ma.us, {ima|lotus|spdcc}!esegue!johnl
"Now, we are all jelly doughnuts."