Path: utzoo!utgpu!jarvis.csri.toronto.edu!clyde.concordia.ca!uunet!mcsun!sunic!tut!santra!tuura!risto
From: risto@tuura.UUCP (Risto Lankinen)
Newsgroups: comp.sys.ibm.pc
Subject: Re: Interrupt question
Message-ID: <635@tuura.UUCP>
Date: 2 Mar 90 10:21:19 GMT
References: <140700021@cdp>
Organization: Nokia Data Systems Oy
Lines: 19

jim@cdp.UUCP writes:
>Does anyone have any information on exactly (in excruciating detail)
>what happens after the CPU receives a hardware interrupt and before the time
>the interrupt handler is entered.  In what order do context saves,
>etc. happen?  In what order to registers get put on the stack?  What ...

>Jim Wampler

There was a very good article, called "How the 8259A PIC Manages External
I/O Devices" in the Microsoft Systems Journal, May'89 (Vol 4 #3) on this
subject.

terveisin: Risto Lankinen

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