Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uwm.edu!uwvax!astroatc!nicmad!madnix!jason
From: jason@madnix.UUCP (Jason Blochowiak)
Newsgroups: comp.sys.apple2
Subject: Re: apple // and multitasking, perfect together! (??????????)
Message-ID: <1170@madnix.UUCP>
Date: 14 Mar 90 09:08:38 GMT
References: <14298@phoenix.Princeton.EDU> <1990Mar8.012055.3726@spectre.ccsf.caltech.edu>
Reply-To: jason@madnix.UUCP (Jason Blochowiak)
Organization: ARP Software, Madison, WI
Lines: 37

toddpw@tybalt.caltech.edu (Todd P. Whitesel) writes:
>tbrakitz@phoenix.Princeton.EDU (Byron Rakitzis) writes:
>> [oh, just gobs of stuff deleted]
>You're not giving the 6502 enough credit, either: you can write very good
>programs on the 6502 -- IF you exploit its full capabilities, which NO ONE
>really does these days.

	I dunno about the 6502, but as far as the '816 goes - I dare you to
look at John Brooks' code and say that again :) He knows the CPU and the rest
of the machine on a first-name basis. Happens not to be my coding style, but
I'm still quite impressed with it.

>>So far, I've decided on a few implementation details: following the
>>lead of the MIPS, all memory accessing instructions will be of the
>>load/store variety only (that is, all arithmetic, etc. instructions
>>must take registers or immediate arguments as their operands). [...]
>The 6502 already does this if I am not mistaken.

	I believe you are mistaken. For example, it's possible to do something
like:
	lda	<zp1
	and	<zp2
where, in a load/store only type architecture, you'd do something like:
	lda	<zp1
	ldb	<zp2
	and	a,b
where 'b' is some new register (and, yes, I'm aware of the pseudo-register
B on the '816).

>Todd Whitesel
>toddpw @ tybalt.caltech.edu


-- 
                      Jason Blochowiak - jason@madnix.UUCP
or, try:         astroatc!nicmad!madnix!jason@spool.cs.wisc.edu
       "Education, like neurosis, begins at home." - Milton R. Saperstein