Path: utzoo!utgpu!jarvis.csri.toronto.edu!cs.utexas.edu!usc!zaphod.mps.ohio-state.edu!van-bc!ubc-cs!uw-beaver!Teknowledge.COM!unix!hplabs!hpda!hpcupt1!hpsal2!hull@hpsal2.HP.COM
From: hull@hpsal2.HP.COM (James Hull)
Newsgroups: comp.sys.hp
Subject: Re: HP PA assembly language question
Message-ID: <4750008@hpsal2.HP.COM>
Date: 6 Mar 90 18:42:55 GMT
References: <564@opus.NMSU.EDU>
Organization: HP System Architecture Lab, Cupertino
Lines: 58

James Thomas writes:

> I'm an old CISC hacker trying to understand the PA and some of the choices
> made in its design :-)
> 
> In the HP Precision Architecture Handbook (I have June 1987), on page 5-59,
> there is a description of a normal intraspace routine call, to wit:
> 
> 	BL	target,rp			LDIL	L%target,rp
> 	BLE	R%target(GRr,rp)
> 	OR	GR31,0,rp
> 
> .  Now, I understand the other version with the LDIL, but I am stymied by
> the two branches version.

You've run across a printing error in the Second Edition (June 1987).
The same example from the Third Edition (April 1989) shows:

call:	BL    target,rp           or           LDIL  l%target,rp
					       BLE   r%target(SR4,rp)
                                               OR    GR31,0,rp

return: BV    0(rp)               or           BE    0(SR0,rp)

What this is trying to show is that one of two sequences is used to perform
an intraspace call/return depending on whether the target is within range
of a BL or not.  If it is, a simple BL branches to the target and saves the
return point in the general register "rp", and a BV through "rp" branches
back at the end of the procedure.

If the target is too far to reach with a BL (which has a 17-bit signed word
displacement, giving +- 256K bytes), the 3-instruction sequence LDIL/BLE/OR
is used to do the call and a BE does the return.  This sequence works as
follow:  The LDIL loads the leftmost 21 bits of the target's absolute
address into the upper 21 bits of general register "rp".  The BLE branches
to the target by adding the right part of the target's address to register
"rp" to get the offset, and uses SR4 as the target space (SR4 is assumed to
be equal to the current instruction space).  The BLE instruction is
hardcoded to save the offset of the return point in GR31 and the space of
the return point in SR0.  The OR instruction in the delay slot of the BLE
copies the return point offset into "rp".  To return from the procedure,
the BE branches to the return point using SR0 (saved by the BLE) and "rp"
(saved by the OR).

> [correct analysis of bogus sequence deleted]
> 
> What is wrong with the above picture?  Would some PA guru please fill in my
> understanding delay slot?

Well, what's wrong with the picture is that the picture is wrong. :-)
By the way, if you'd like to get the Third Edition, the part number is
09740-90014.

> Thank you.

Sure.

 -- Jim Hull