Path: utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!zaphod.mps.ohio-state.edu!usc!ucla-cs!uci-ics!gateway
From: rfg@paris.ics.uci.edu (Ronald Guilmette)
Newsgroups: comp.sys.m88k
Subject: What the heck is "instruction folding"?
Message-ID: <25FAED94.24113@paris.ics.uci.edu>
Date: 12 Mar 90 00:30:12 GMT
Organization: UC Irvine Department of ICS
Lines: 31

The following is a short excerpt from the March 1990 issue of Unix Review
(page 26):

	In December 1989, Dolphin { Server Technology } announced the Orion,
	a project that is to take performance far beyond today's 88k
	processors by building a processor using the 88k instruction set
	that is capable of executing up to eight instructions in parallel
	to achieve a theoretical peak performance of 1000 MIPS.  Dolphin
	Marketing Manager Lars Lauritzsen says the ECL processor uses a
	patented technique that the company calls "instruction folding",
	a result of Norsk's research in improving performance.

...and later on...

	... the Orion processor should ship in the first half of 1992.
	Orion is the subject of a mutual exchange of patented technology
	between Dolphin and Motorola.

I wonder what this is all about.  Perhaps someone reading this can enlighten
me.

I understand that it might make sense to make a VLIW version of an 88k,
but what is this "instruction folding" stuff all about?  That's a new one
on me!  Is it just marketing hype or is there really something novel here?

Since the claim is made that is it already patented, I can't see any
reason for undue secrecy.  Perhaps one of the many Motorola engineers
who reads this newsgroup on a regular basis will enlighten us all about
"instruction folding".

// rfg